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= = = 0. UNDERSTAND TTL = = =
Note: If you already have moderate experience with TTL, you may skip to the next section.
Second note: This page assumes that you have an elementary understanding of electronics. (You should know that a power supply has a positive and negative end, and current travels through wires.) Binary and hexadecimal are also worth learning.
= BASIC PRINCIPLES =
- TTL circuits are composed of many chips. Here is a TTL chip:
- Each chip is identified by a number. You can use this number to find the chip's data sheet. Here is an example data sheet. Use data sheets to see the layout of chips.
- The "top" of a chip is marked by a semicircular indent. All chips need to be attached to a power supply. Typically, the bottom left pin should be attached to ground (negative), and the top right attached to source (positive).
- The remaining pins are either inputs or outputs.
- Important: a wire may be in one of three states:
- HIGH (attached to source)
- LOW (attached to ground)
- DETACHED (attached to neither ground nor source; sometimes called high-impedance)
- Never cross a HIGH output with a LOW output, or you will have a short circuit!
- It is OK to attach a HIGH or LOW output to a wire in the "detached" state; HIGH or LOW will override detached.
- Make sure that all relevant inputs are either HIGH or LOW, not detached! The chip will become confused if the input is not well defined.
- The acronym "OE" stands for "output enable". Some chips have an OE pin. When the OE pin has a HIGH input, all output pins of the chip will enter the detached state. When the OE pin has a LOW input, the output pins will enter a HIGH state or LOW state (depending on other inputs).
- "CP" stands for "clock pulse", and "WE" stands for "write enable". These are typically used to accept data into memory or advance a counter. They are either triggered by a rising edge (LOW to HIGH signal) or falling edge (HIGH to LOW signal). Note that I may sometimes use WE to refer to both write enable and clock pulse.
- In some chips (such as mass storage), certain pins can behave as both inputs and outputs. The direction of data depends on OE.
= CHIPS IN THE DUO COMPACT =
There are only a handful of chips in the DUO Compact. These are the different types.
Discrete logic gate: The 4049 chip contains 6 NOT gates, and the 4001 chip contains 4 NOR gates. Each gate accepts 1 or 2 inputs and gives 1 output. The output depends on the value of the inputs at any given time. The logic table for each gate is below:
+------------------+ +-------------------------------+
| NOT | | NOR |
+--------+---------+ +----------+----------+---------+
| Input: | Output: | | Input A: | Input B: | Output: |
+--------+---------+ +----------+----------+---------+
| LOW | HIGH | | LOW | LOW | HIGH |
+--------+---------+ +----------+----------+---------+
| HIGH | LOW | | HIGH | LOW | LOW |
+--------+---------+ +----------+----------+---------+
| LOW | HIGH | LOW |
+----------+----------+---------+
| HIGH | HIGH | LOW |
+----------+----------+---------+
Buffer: A buffer has 1 data input, 1 OE input, and 1 data output. When OE is LOW, the data input is channeled directly to data output. When OE is HIGH, the data output is DETACHED regardless of data input. The 74HC244 has 8 buffers, and all of their OE inputs are connected to a single pin.
+-----------------------------+ | BUFFER | +----------+------+-----------+ | Data In: | OE: | Data Out: | +----------+------+-----------+ | LOW | LOW | LOW | +----------+------+-----------+ | HIGH | LOW | HIGH | +----------+------+-----------+ | LOW | HIGH | DETACHED | +----------+------+-----------+ | HIGH | HIGH | DETACHED | +----------+------+-----------+
Flip flop: The 74AC374 stores 8 bits of data. Each bit is represented by a HIGH or LOW output. To change the latched value, feed new bits through the data input, then trigger CP. Note that this chip also has an OE pin, so you can conditionally detach the data output.
Counter: A counter advances its value when CP is activated. The 74HCT4520 yields a binary output. The 74HC4017 sequentially gives a HIGH output through one of its 10 output pins. Both chips have a reset pin which sets the count back to the beginning.
Multiplexer and demultiplexer: A multiplexer has many data inputs, an address input, and a data output. The multiplexer uses the address to channel one of the data inputs to data output. A demultiplexer works in the opposite fashion; it has one data input and many data outputs. The demultiplexer uses the address to channel the data input to one of the data outputs. The 74HCT257 and 74AC139 contain several (de)multiplexers in parallel. These both have enable/disable pins.
Mass storage: There are several chips which store large quantities of data. SRAM is fast, but does not preserve information when power is cut off. EEPROM is slow, cannot be written an infinite number of times, but is not affected by loss of power. Flash is similar to EEPROM, but is less expensive in large quantities. All of these chips have a similar layout: A set of 2-way data pins, several address pins, an OE pin, and a WE pin. When OE is LOW, the data pins behave as outputs. When OE is HIGH, the data pins behave as inputs. If WE is triggered while OE is HIGH, the chip will write the input value to memory. Note that Flash has an additional security protocol for the write operation. See the data sheet for specifications.
If you want to learn more about digital logic, here are some good resources:
www.howstuffworks.com
www.kpsec.freeuk.com